Skip to content
Adjacency Theory markAdjacency Theory

Experiment v0.1 · acceptance thresholds · locked

We fixed the scorecard before the machine exists, so we cannot grade ourselves generously later.

Ten gates, each with an exact number attached. Two of them are the signatures that matter: the trip must get relatively faster as the network grows, and fewer of the nodes must ever be awake at once. Both must fall together. If only the first happens, we built an ordinary switched network and we will say so.

Status

pre-registered targets · not measurements

ACCEPTANCE THRESHOLDS LOCKED · HARDWARE DATA NOT YET COLLECTED · PHYSICAL EVIDENCE NONE

Locked gates

10

S1 → S10

Blinded conditions

6

analysis sees labels only

Topologies per N

≥ 3

independently reconfigured

Physical evidence

NONE

The two signatures

pre-registered targets · not measurements

A pass requires both curves to fall as the network grows: the trip gets relatively faster while fewer of the nodes are ever awake at once. Either one alone is a different, lesser result.

0.000.250.500.751.00N = 16N = 32N = 640.900.350.650.200.450.12
—— R_T(N) = T_C* / T_C0 (latency ratio)- - - f_active = max_t(N_active / N)

Both curves must fall together. A falling latency ratio with a flat or rising active fraction is a CONVENTIONAL SWITCHING EFFECT, not the architecture. A falling active fraction with no latency ratio movement is a quiet network doing nothing interesting.

The two-ruler bench test

illustrative power planning · assumed noise · not data
Ruler 1
How much faster?

R_T = T_C* / T_C0. An ordinary programmable switch can move this ruler too.

Ruler 2
How little of the system woke up?

f_active = max_t(N_active / N). Conventional switching usually does not move this one.

0.000.250.500.751.00N = 16N = 32N = 64rival stays flat ≈ 0.26
—— C* latency ratio (target)—— C* active fraction (target)– – conventional switching, latency– – conventional switching, active fraction·· H0 null, R_T ≈ 1

The rival tracks us closely on ruler 1 and never leaves the top of ruler 2. Our candidate must move both rulers in the predicted direction, or it is indistinguishable from an ordinary switched network.

Design targets, null, and rival

illustrative power planning · assumed noise · not data
HypothesisR_T at N=16 / 32 / 64f_active at N=16 / 32 / 64Reading
C*
C* candidate (design target)
0.80 · 0.55 · 0.350.25 · 0.14 · 0.08Both rulers move. The trip gets relatively faster while a smaller and smaller share of the machine is ever awake.
H0
H0 — ordinary local propagation
1.00 · 1.00 · 1.000.25 · 0.14 · 0.08The null. No transport advantage at any size. Active fraction is not diagnostic here; the latency ruler carries the test.
H1
H1 — conventional programmable switching
0.78 · 0.60 · 0.450.28 · 0.27 · 0.26The dangerous rival. It looks almost identical on latency — and it is caught immediately on sparsity, which stays flat as N grows.

SPARSITY, NOT LATENCY, IS THE CLEAN DISCRIMINATOR. Ordinary programmable switching can also find a faster route — it simply wakes a large, roughly constant fraction of the network to do it. At N = 16 the latency channel alone would need hundreds of runs per condition to separate our candidate from conventional switching; the active-fraction channel separates them in a few dozen.

Illustrative power planning · trials per condition

illustrative power planning · assumed noise · not data

Design targets and assumed noise only. The standard deviations below are planning assumptions, not measurements, so every trial count derived from them is an illustrative power-planning output — not a guarantee, not a promise, and not a commitment to stop at that number. Real spreads arrive with P0 calibration and will move these figures, possibly a great deal.

Assumed SD · latency ratio
0.08
Assumed SD · active fraction
0.03
Design
two-group · 95% CI · 80% power
ContrastChannelN=16N=32N=64Comment
C* vs H0 (ordinary local propagation)latency~3~1~1Beating 'no advantage at all' is easy on paper. This contrast is not where the experiment is won.
C* vs H1 (conventional switching)latency~251~41~11The two hypotheses sit 0.02 apart at N = 16 against an assumed SD of 0.08. Latency alone is nearly useless at small N.
C* vs H1 (conventional switching)sparsity~16~1~1The same rival is separated by the active-fraction ruler at a small fraction of the cost. This is the discriminating channel.

Assumed per-run standard deviations used for the planning arithmetic. Two-group comparison, 95% confidence, 80% power. Replaced by measured spreads after P0.

Primary preregistered signature · joint

Because of the row above, the PRIMARY PRE-REGISTERED SIGNATURE IS JOINT: the latency ratio must decrease with N, AND the active fraction must decrease with N, AND the count of illicit global controller writes must be exactly zero. No one of the three is sufficient, and a pass on latency alone is explicitly not a pass.

Decision boundary · fixed before data

R_T improves with N
f_active flat
controller: any
CONVENTIONAL SWITCHING-LIKE

We built a programmable switched network. Real result, published as such, and not the architecture.

R_T no better than C0
f_active falls with N
controller: any
SPARSE BUT NO TRANSPORT ADVANTAGE

The corridor is genuinely local and quiet, and it buys nothing on the trip. Interesting, insufficient.

R_T improves
f_active falls
controller: global controller used
INVALID / GLOBAL SCHEDULING

Not a weak result — no result. The runs are void and are reported as void.

R_T improves
f_active falls
controller: local-only, fidelity and restoration pass
ANALOGUE HARDWARE EFFECT CANDIDATE

The only cell on this matrix that advances the programme — and still a statement about circuits, not about spacetime.

Initial run counts · planning only

illustrative power planning · assumed noise · not data
N = 16
≥ 20 valid runs per condition

Sparsity discrimination and the false-trigger rate estimate both dominate here, and the latency channel is nearly blind at this size.

N = 32
≥ 20 valid runs per condition

Holds the sparsity trend and keeps the false-trigger interval usable.

N = 64
≥ 20 valid runs per condition, if practical

Bench capacity permitting. A shortfall is reported, not hidden in a pooled average.

Planning figures, not final statistics. Condition labels stay blinded during scoring, and the analysis is locked before unblinding. If measured noise demands more runs than planned, the run count rises — the threshold never falls.

No moving goalposts · preregistration lock

pre-registered targets · not measurements

ACCEPTANCE THRESHOLDS LOCKED · HARDWARE DATA NOT YET COLLECTED · PHYSICAL EVIDENCE NONE

No post-hoc reinterpretation. Thresholds, metrics, blinding scheme, exclusion rules and analysis plan are fixed as written. If observed data misses a threshold, the gate is recorded FAILED — it is not re-described, re-normalised, re-windowed, or split into a favourable subset.

Thresholds fixed before hardware exists.
Fidelity metric and noise calibration frozen before unblinding.
Exclusions permitted only for hardware faults and instrument saturation.
Amendments allowed only before the affected data is collected, and published with a timestamp.

Locked acceptance gates S1 → S10

pre-registered targets · not measurements
S1Relative transport

R_T(N) = T_C* / T_C0, median over runs, with confidence intervals

Must DECREASE MONOTONICALLY across N = 16, 32, 64 within confidence intervals, and meet the target medians.

N = 16
≤ 0.90
N = 32
≤ 0.65
N = 64
≤ 0.45

Design targets, not claims. A non-monotonic series fails this gate even if individual medians are met.

S2Sparsity

f_active = max over t of (N_active / N), median over runs

Must DECREASE with N and meet the target medians.

N = 16
≤ 0.35
N = 32
≤ 0.20
N = 64
≤ 0.12

This is the gate that separates a moving corridor from a network that simply wakes up.

S3Locality of control

controller reads and writes outside the allowed local neighbourhood / address rule

EXACTLY ZERO during every valid run.

Any global topology read, precomputed route injection, or destination-wide switch INVALIDATES the run outright.

S4Payload fidelity

structured-waveform decode fidelity against the transmitted test vector, after accounting for instrument noise

≥ 99%.

The fidelity metric and its noise calibration are defined and frozen BEFORE unblinding. No metric selection afterwards.

S5Restoration

deviation of every coupling and state variable from the C0 baseline at the end of a fixed restoration window

All variables within 5% of C0 inside the fixed window.

No global reset command is permitted at any point. A run that needs one is a failed run, not a slow one.

S6False triggers

spontaneous doorway events in matched no-trigger controls

≤ 1%, over enough repeated trials to estimate the rate meaningfully, reported with its confidence interval.

Trial count is declared in advance; a rate quoted without an interval does not count.

S7Energy / control ledger

total electrical energy plus FPGA and control-plane operations per COMPLETED payload

Reported unconditionally, favourable or not.

NO 'efficiency' pass is available unless C* is favourable against the matched local-switching control under identical instrumentation.

S8Controls and blinding

six blinded conditions minimum

C0 baseline · random local switching · globally optimized switching (positive control) · C* local law · disabled-address control · sham trigger. Analysis receives blinded labels.

The analyst does not learn the mapping until every endpoint has been computed.

S9Scaling

fits of T_C*, active-node peak, control writes and energy against N

Sublinear scaling may be called ONLY if confidence bounds exclude z ≥ 1 over the tested range.

Otherwise the result is labelled FINITE-SIZE INDICATION ONLY. Three points is three points.

S10Replication

independently reconfigured topologies per N, and repeated runs per topology

≥ 3 independent topologies per N, with repeated runs on each.

Exclusions are predefined and permitted SOLELY for hardware faults and instrument saturation. No performance-based exclusion exists.

Six blinded conditions

KeyConditionRole in the analysis
K1C0 baselineReference. Denominator of R_T.
K2Random local switchingMatched null. C* must beat it or there is no result.
K3Globally optimized switchingPositive control. Allowed to win on raw speed; not the target.
K4C* local lawThe condition under test.
K5Disabled addressIsolates addressing from excitability.
K6Sham triggerBelow-threshold injection. Feeds the false-trigger estimate.

The analyst receives blinded labels only. The mapping from key to condition is revealed after every endpoint has been computed.

Invalid run · worked examples

These are the log lines that void a run. A voided run is reported, never quietly dropped.

Global topology readVOID
READ  src=CTRL  scope=GLOBAL  obj=adjacency_matrix  t=00:00:01.204

The controller consulted the whole graph. Every subsequent write in the run is suspect. VOID.

Precomputed route injectionVOID
WRITE src=CTRL  scope=PATH[3,9,14,22]  gain=1.0  t=00:00:01.310

A full path was configured in one write. This is the cheating positive control, not C*. VOID.

Destination-wide switchVOID
WRITE src=CTRL  scope=ALL_NODES  field=dest_id  val=22  t=00:00:01.288

A destination beacon reached every node. Locality is broken. VOID.

Post-trigger manual interventionVOID
WRITE src=OPERATOR  node=14  edge=14-22  gain=0.8  t=00:00:02.941

A human touched the substrate after the trigger. VOID.

Log gapVOID
WRITE seq=1187  t=00:00:03.002   ← previous seq=1184

Sequence numbers 1185 and 1186 are missing. Unauditable, therefore void. VOID.

Legal local write, for contrastVALID
WRITE src=NODE_14 scope=NBR(14) edge=14-22 gain=1.0 addr_prefix=match t=00:00:02.117

Origin is the node itself, scope is its own neighbourhood, decision used only local state and the address prefix. VALID.

Raw-data export schema · every run, including failures

FieldTypeDetail
run_idstringGlobally unique, assigned before the run starts.
blinded_conditionenum K1…K6Unmapped at analysis time.
Nint16, 32 or 64.
topology_hashhexHash of the frozen substrate graph and seed.
trigger_timetimestampOrigin of every latency measurement in the run.
payload_idstringIdentifies the transmitted test vector.
node_state_timeseriesarrayPer node: oscillator state, c_i, r_i over time.
coupling_write_logarrayEvery coupling change with source, scope, value, timestamp.
controller_read_logarrayEvery controller read with scope. Scans for S3 violations.
energy_tracearraySubstrate rail and control-plane rail, recorded separately.
arrival_timetimestampDecoded arrival at B.
decode_scorefloatFidelity against the transmitted vector, frozen metric.
restore_timedurationUntil all variables sit within 5% of C0.
exclusionsarrayHardware fault or instrument saturation only, with evidence.

What the hardware may be allowed to say

These labels are assigned only after hardware data exists, by the rules below, with no fourth option available.

ANALOGUE HARDWARE EFFECT OBSERVED

All primary gates S1 → S10 pass.

A programmable oscillator network physically realized the localized phase-gated routing architecture. A statement about circuits.

CONVENTIONAL SWITCHING EFFECT

Latency improves, but sparsity (S2) or control locality (S3) fails.

We built a switched network. Real, useful, and not the architecture. Published as such.

BENCH HYPOTHESIS FAILS

No robust latency advantage over C0 and the matched local-switching null.

The architecture does not survive contact with hardware at these scales. Stays on the site permanently.

NO SPACETIME INFERENCE IS AVAILABLE FROM ANY OUTCOME ON THIS PAGE. A bench pass would concern latency, footprint, energy and locality of control in an electronic network. It would say nothing about distance, geometry, or the transport of matter, and physical evidence for Adjacency Theory would remain NONE.