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Adjacency Theory markAdjacency Theory

Phase 75 · perfect the test

Make the normal road long, and the stopwatch stops being the argument.

The decisive test must not hinge on a few hundred picoseconds of apparent advance across a short bench. This phase engineers the causal separation instead: two isolated endpoint islands, calibrated fibre or delay-line group delay in every permitted route, an unpredictable hardware-RNG payload generated only after arming, first valid decode timed by two independent measurement stacks, an empirical D_tau taken as the minimum over all inventoried physical paths, and delay scaling that separates a fixed instrumentation offset from a hidden bypass. Physical evidence remains NONE.

Phase 75 · perfect the test · delay-amplified causal bench

Do not win by a hair. Engineer the gap until the stopwatch cannot be blamed.

Instead of arguing about a photo finish, make the normal road very long. If the fastest permitted physical route takes microseconds and our stopwatches are good to sub-nanosecond, then a real advance would be thousands of times larger than the uncertainty — and blaming the stopwatch stops being possible.

metrology-grade design · no apparatus builtphysical evidence: none

Correction · why Phase 74 sizing was fragile

What we got wrong in Phase 74

Phase 74 sized the win condition against a picosecond timing budget on a short bench, where the combined uncertainty is a meaningful fraction of any plausible advance. That is a fragile experiment: every result would be a calibration argument. The fix is metrological, not statistical — amplify the causal separation on purpose. Standard telecom fibre delays light by roughly 4.9-5 microseconds per kilometre, while White-Rabbit-class distributed timing provides sub-nanosecond synchronisation with picosecond-scale precision. One kilometre of spool buys ~5 us of guard band against ~1 ns of timing uncertainty: a ratio of thousands, not units.

We deliberately do NOT hard-code a picosecond anomaly target. The point of the delay-amplified design is that the guard band emerges at ns/us scale from the architecture itself. Any preregistered threshold is stated as max(10 * sigma_total, fixed engineering guard band) for the apparatus as built.

Delta = D_tau_lower_bound - T_decode_upper_bound >= max(10 * sigma_total, guard_band)

Visual · make the gap huge

ENGINEERING ILLUSTRATION — not results, not measurements
SHORT BENCH — uncertainty is a big fraction of the claimpath ~2 ns±56 psratio ≈ 35 : 1 — fragileDELAY-AMPLIFIED — 1 km-class fibre, sub-ns timingcalibrated fibre path ≈ 5 µs (≈4.9–5 µs per km)timing ≪ 1 nsratio ≈ 5,000 : 1 or better — the guard band is built, not arguedBars are schematic and not to scale. Numbers are engineering illustrations, not measurements.
S1
Short bench (Phase 74 sizing)
path delay
~2 ns typical board path
timing uncertainty
~56 ps combined 1-sigma
ratio
~35 : 1
FRAGILE — every result becomes a calibration argument

A claimed advance of a few hundred picoseconds sits within a factor of tens of the uncertainty, and one uncalibrated leakage edge produces it.

S2
Delay-amplified (1 km-class fibre)
path delay
~5 us (fibre ~4.9-5 us per km)
timing uncertainty
sub-ns, ps-class precision
ratio
~5,000 : 1 or better
ROBUST — an advance would dwarf the instrumentation

The guard band is engineered into the apparatus rather than argued out of the statistics. Fibre delay is also directly verifiable by OTDR and by swapping spools.

Architecture · thirteen requirements, frozen before hardware

R1Isolation
Two physically separated endpoint islands

Islands A and B with independent power where practical, independent local clocks and timestamp hardware, and no shared Ethernet, USB or control path during a run. Separation is physical, not administrative.

R2Isolation
Every permitted route carries deliberate calibrated delay

The only allowed A->B interactions are explicitly inventoried experimental channels, and each one is loaded with fibre spool or delay line of known group delay. Every route is characterised bidirectionally and over temperature — never from nominal cable length.

R3Payload
Hardware random payload generated after arming and state freeze

The payload is produced at A only after arming and after route and controller state are frozen. It must be unpredictable to B and to the analysis host before generation. Source entropy health is logged and the payload is hashed immediately after generation.

R4Payload
First influence and first valid decode are separate observables

B timestamps the earliest physically detectable influence AND, separately, the first statistically valid decode of the payload. The physics claim uses only first valid decode of genuinely new information — never a threshold crossing and never a correlation.

R5Timing
Two independent measurement stacks with different calibration models

White-Rabbit-class distributed timing plus an independent oscilloscope/TDC cross-check. Neither stack may share the other's calibration model or reference chain. Raw waveforms and timestamps are preserved unsmoothed.

R6Causal bound
D_tau is empirical, conservative, and minimised over all paths

For every inventoried path, repeatedly measure the earliest transfer time achievable under the strongest permitted conventional signalling, include uncertainty and drift, and then take the MINIMUM across all physical paths. Nominal cable length is never an input.

R7Causal bound
Win statistic with a huge preregistered margin

Delta = D_tau_lower_bound - T_decode_upper_bound. Delta must be positive by at least max(10 * sigma_total, fixed engineering guard band). Both terms are taken at the confidence bound that disfavours us.

R8Causal bound
Scale the delay, not just the node count

Repeat across increasing inserted path delay (multiple fibre lengths or delay settings). A fixed electronics offset does not scale with inserted delay; a genuine candidate must preserve or grow its margin relative to the calibrated bound.

R9Controls
Cable-swap null

Replace each long path with an electrically or optically equivalent short path and verify the apparent anomaly disappears or reclassifies exactly as the model predicts. A margin that survives the swap is an instrumentation artefact.

R10Controls
Hidden-shortcut challenge

Secret conventional bypasses are inserted in positive-control runs. The channel-inventory and audit pipeline must detect every one of them BEFORE unblinding, or no run on that apparatus counts.

R11Controls
EM and physical security controls

RF spectrum scans, optical leakage checks, shielded enclosures where appropriate, separate power domains or fully characterised coupling, radios disabled, no shared clocks unless explicitly inventoried, cable continuity and OTDR traces for fibre, physical inspection, continuous thermal logging.

R12Controls
Randomized topology and endpoint labeling after firmware freeze

Wiring permutations and endpoint relabeling applied after the bitstream hash is locked, so no layout artefact or precomputed table can key off node identity.

R13Replication
Independent replication ladder

Same apparatus with new operators -> independently rebuilt timing stack -> independently built second apparatus -> external lab replication. Only the final stages permit any discussion beyond 'causal-bound anomaly candidate'.

Visual · scaling test for artifacts

Insert more calibrated delay and watch what the apparent early-arrival margin does. Each hypothesis has a different, preregistered shape — which is why delay scaling, not a single run, is the discriminator.

inserted calibrated delay →margin ↑1×2×3×4×5×(a) fixed offset(b) hidden shortcut(c) candidate
Fixed timing offset / instrumentation artefact
Margin approximately CONSTANT as inserted delay grows

An uncalibrated constant offset does not know how long the fibre is. Its apparent margin stays put while the calibrated bound grows, so its relative significance collapses.

Hidden conventional bypass
Margin TRACKS the bypass delay, and the inventory challenge finds it

A bypass has its own fixed delay, so the apparent margin grows exactly as the long route grows — a tell-tale linear signature — and the hidden-shortcut challenge (R10) is designed to catch it before unblinding.

Genuine anomaly candidate (hypothetical)
Margin remains beyond the causal lower bound at EVERY delay setting

The only signature the protocol would accept: the advance survives every inserted delay with preregistered uncertainty, survives the cable-swap null, and survives both timing stacks. We do not expect this and nothing here implies it will occur.

The curves are illustrative shapes used to define what each hypothesis predicts before data exists. They are not simulations of our apparatus and case (c) is not a prediction — it is the shape we have committed to require.

Project status · stated honestly

  • TOY ARCHITECTURE: CONDITIONAL / UNRESOLVED. Exact-fabric concurrency and throughput debts from Phase 66 remain open and are not cleared by any later phase.
  • ANALOGUE BENCH PROTOCOL: ADVANCED. The measurement architecture, audit pipeline and replication ladder are specified in detail and frozen before hardware.
  • FRONTIER EXPERIMENT: now specifically the DELAY-AMPLIFIED NO-HIDDEN-SHORTCUT TEST — engineered causal separation, empirical minimum-over-paths bound, dual independent timing, delay scaling.
  • PHYSICAL EVIDENCE: NONE. Nothing has been built and nothing has been measured.

For a ten-year-old

Instead of trying to tell whether someone won a race by a hair, we make the normal road really long and measure it with two stopwatches. If our special path wins by a huge amount, it is much harder to blame the stopwatch.